diff 178cd4d1139b8ba928ddac19578643637a953a93 uncommitted --- a/sys/src/cmd/9a/lex.c +++ b/sys/src/cmd/9a/lex.c @@ -476,8 +476,11 @@ "FCTIDZCC", LFCONV, AFCTIDZCC, "FCFID", LFCONV, AFCFID, "FCFIDCC", LFCONV, AFCFIDCC, - "LDAR", LXLD, ALDAR, - "MOVD", LMOVW, AMOVD, + "LBAR", LXLD, ALBAR, + "LHAR", LXLD, ALHAR, + "LDAR", LXLD, ALDAR, + "LQAR", LXLD, ALQAR, + "MOVD", LMOVW, AMOVD, "MOVDU", LMOVW, AMOVDU, "MOVWZ", LMOVW, AMOVWZ, "MOVWZU", LMOVW, AMOVWZU, @@ -510,7 +513,10 @@ "SRAD", LSHW, ASRAD, "SRADCC", LSHW, ASRADCC, "SRDCC", LSHW, ASRDCC, + "STBCCC", LXST, ASTBCCC, + "STHCCC", LXST, ASTHCCC, "STDCCC", LXST, ASTDCCC, + "STQCCC", LXST, ASTQCCC, "TD", LADDW, ATD, /* pseudo instructions */ --- a/sys/src/cmd/9c/9.out.h +++ b/sys/src/cmd/9c/9.out.h @@ -362,6 +362,12 @@ AHRFID, ALWSYNC, + ALBAR, + ALHAR, + ALQAR, + ASTBCCC, + ASTHCCC, + ASTQCCC, ALAST }; --- a/sys/src/cmd/9l/asmout.c +++ b/sys/src/cmd/9l/asmout.c @@ -1452,10 +1452,14 @@ case AMOVHZ: return OPVCC(31,279,0,0); /* lhzx */ case AMOVHZU: return OPVCC(31,311,0,0); /* lhzux */ case AECIWX: return OPVCC(31,310,0,0); /* eciwx */ + case ALHAR: return OPVCC(31,116,0,0); /* lharx */ case ALWAR: return OPVCC(31,20,0,0); /* lwarx */ + case ALDAR: return OPVCC(31,84,0,0); /* ldarx */ + case ALQAR: return OPVCC(31,276,0,0); /* lqarx */ case ALSW: return OPVCC(31,533,0,0); /* lswx */ case AMOVD: return OPVCC(31,21,0,0); /* ldx */ case AMOVDU: return OPVCC(31,53,0,0); /* ldux */ + case ALBAR: return OPVCC(31,52,0,0); /* lbarx */ } diag("bad loadx opcode %A", a); return 0; @@ -1519,8 +1523,11 @@ case AMOVWU: return OPVCC(31,183,0,0); /* stwux */ case ASTSW: return OPVCC(31,661,0,0); /* stswx */ case AMOVWBR: return OPVCC(31,662,0,0); /* stwbrx */ + case ASTBCCC: return OPVCC(31,694,0,0); /* stbcx */ + case ASTHCCC: return OPVCC(31,726,0,0); /* sthcx */ case ASTWCCC: return OPVCC(31,150,0,1); /* stwcx. */ case ASTDCCC: return OPVCC(31,214,0,1); /* stwdx. */ + case ASTQCCC: return OPVCC(31,182,0,1); /* stqcx. */ case AECOWX: return OPVCC(31,438,0,0); /* ecowx */ case AMOVD: return OPVCC(31,149,0,0); /* stdx */ case AMOVDU: return OPVCC(31,181,0,0); /* stdux */ --- a/sys/src/cmd/9l/span.c +++ b/sys/src/cmd/9l/span.c @@ -530,7 +530,11 @@ oprange[AICBI] = oprange[r]; break; case AECOWX: /* indexed store: op s,(b+a); op s,(b) */ + oprange[ASTBCCC] = oprange[r]; + oprange[ASTHCCC] = oprange[r]; oprange[ASTWCCC] = oprange[r]; + oprange[ASTDCCC] = oprange[r]; + oprange[ASTQCCC] = oprange[r]; break; case AREM: /* macro */ oprange[AREMCC] = oprange[r]; @@ -809,7 +813,11 @@ oprange[AFMOVSU] = oprange[r]; break; case AECIWX: + oprange[ALBAR] = oprange[r]; + oprange[ALHAR] = oprange[r]; oprange[ALWAR] = oprange[r]; + oprange[ALDAR] = oprange[r]; + oprange[ALQAR] = oprange[r]; break; case ASYSCALL: /* just the op; flow of control */ oprange[ARFI] = oprange[r]; --- a/sys/src/libmach/qdb.c +++ b/sys/src/libmach/qdb.c @@ -1218,8 +1218,11 @@ {46, 0, 0, "MOVMW", load, ldop}, {31, 597, ALL, "LSW", gen, "(R%a),$%n,R%d"}, {31, 533, ALL, "LSW", ldx, 0}, + {31, 52, ALL, "LBAR", ldx, 0}, + {31, 116, ALL, "LHAR", ldx, 0}, {31, 20, ALL, "LWAR", ldx, 0}, - {31, 84, ALL, "LWARD", ldx, 0}, /* 64 */ + {31, 84, ALL, "LDAR", ldx, 0}, /* 64 */ + {31, 276, ALL, "LQAR", ldx, 0}, /* 64 */ {58, 0, ALL, "MOVD", load, ldop}, /* 64 */ {58, 1, ALL, "MOVDU", load, ldop}, /* 64 */ @@ -1378,8 +1381,11 @@ {31, 661, ALL, "STSW", stx, 0}, {36, 0, 0, "MOVW", store, stop}, {31, 662, ALL, "MOVWBR", stx, 0}, + {31, 694, ALL, "STBCCC", stx, 0}, + {31, 726, ALL, "STHCCC", stx, 0}, {31, 150, ALL, "STWCCC", stx, 0}, {31, 214, ALL, "STDCCC", stx, 0}, /* 64 */ + {31, 182, ALL, "STQCCC", stx, 0}, /* 64 */ {37, 0, 0, "MOVWU", store, stop}, {31, 183, ALL, "MOVWU", stx, 0}, {31, 151, ALL, "MOVW", stx, 0}, @@ -1865,9 +1871,6 @@ {31, 435, ALL, "mtvsrdd", 0, 0}, {31, 755, ALL, "darn", 0, 0}, {31, 979, ALL, "slbfee.", 0, 0}, - {31, 52, ALL, "lbarx", 0, 0}, - {31, 116, ALL, "lharx", 0, 0}, - {31, 276, ALL, "lqarx", 0, 0}, {31, 532, ALL, "ldbrx", 0, 0}, {31, 660, ALL, "stdbrx", 0, 0}, {31, 789, ALL, "lwzcix", 0, 0}, @@ -1880,9 +1883,6 @@ {31, 1013, ALL, "stdcix", 0, 0}, {31, 22, ALL, "icbt", 0, 0}, {31, 886, ALL, "msgsync", 0, 0}, - {31, 182, ALL, "stqcx.", 0, 0}, - {31, 694, ALL, "stbcx.", 0, 0}, - {31, 726, ALL, "sthcx.", 0, 0}, {31, 503, ALL, "spom", 0, 0}, {31, 791, ALL, "lfdpx", 0, 0}, {31, 855, ALL, "lfiwax", 0, 0},