OK, turing.

<- leave blank

Sat Aug 1 16:09:03 EDT 2020

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 44c4ae1abd00..d94ddb1c6832 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3825,6 +3825,97 @@ static int delay_250ms_after_flr(struct pci_dev *dev, int
probe)
	return 0;
 }

+/*
+ * AMD Navi 10 series GPUs require a vendor specific reset procedure.
+ * According to AMD a PSP mode 2 reset should be enough however at this
+ * time the details of how to perform this are not available to us.
+ * Instead we can signal the SMU to enter and exit BACO which has the same
+ * desired effect.
+ */
+static int reset_amd_navi10(struct pci_dev *dev, int probe)
+{
+ const int mmMP0_SMN_C2PMSG_81 = 0x16091;
+ const int mmMP1_SMN_C2PMSG_66 = 0x16282;
+ const int mmMP1_SMN_C2PMSG_82 = 0x16292;
+ const int mmMP1_SMN_C2PMSG_90 = 0x1629a;
+
+ u16 cfg;
+ resource_size_t mmio_base, mmio_size;
+ uint32_t __iomem * mmio;
+ unsigned int sol;
+ unsigned int timeout;
+
+ /* bus resets still cause navi to flake out */
+ dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET;
+
+ if (probe)
+ return 0;
+
+ /* save the PCI state and enable memory access */
+ pci_save_state(dev);
+ pci_read_config_word(dev, PCI_COMMAND, &cfg);
+ pci_write_config_word(dev, PCI_COMMAND, cfg | PCI_COMMAND_MEMORY);
+
+ /* map BAR5 */
+ mmio_base = pci_resource_start(dev, 5);
+ mmio_size = pci_resource_len(dev, 5);
+ mmio = ioremap_nocache(mmio_base, mmio_size);
+ if (mmio == NULL) {
+ pci_disable_device(dev);
+ pci_err(dev, "Navi10: cannot iomap device\n");
+ return 0;
+ }
+
+ /* check the sign of life indicator */
+ sol = readl(mmio + mmMP0_SMN_C2PMSG_81);
+ pci_info(dev, "Navi10: SOL 0x%x\n", sol);
+ if (sol == 0 || sol == 0xffffffff) {
+ pci_info(dev, "Navi10: device doesn't need to be reset\n");
+ goto out;
+ }
+
+ pci_info(dev, "Navi10: performing BACO reset\n");
+
+ /* the SMU might be busy already, wait for it */
+ for(timeout = 200; timeout && readl(mmio + mmMP1_SMN_C2PMSG_90) != 0; --timeout)
+ msleep(1);
+ readl(mmio + mmMP1_SMN_C2PMSG_90);
+
+ /* send PPSMC_MSG_ArmD3 */
+ writel(0x00, mmio + mmMP1_SMN_C2PMSG_90);
+ writel(0x46, mmio + mmMP1_SMN_C2PMSG_66);
+ for(timeout = 200; timeout && readl(mmio + mmMP1_SMN_C2PMSG_90) != 0; --timeout)
+ msleep(1);
+
+ /* send PPSMC_MSG_EnterBaco with param */
+ writel(0x00, mmio + mmMP1_SMN_C2PMSG_90);
+ writel(0x00, mmio + mmMP1_SMN_C2PMSG_82);
+ writel(0x18, mmio + mmMP1_SMN_C2PMSG_66);
+ for(timeout = 200; timeout && readl(mmio + mmMP1_SMN_C2PMSG_90) != 0; --timeout)
+ msleep(1);
+
+ /* wait for the regulators to shutdown */
+ msleep(400);
+
+ /* send PPSMC_MSG_ExitBaco */
+ writel(0x00, mmio + mmMP1_SMN_C2PMSG_90);
+ writel(0x19, mmio + mmMP1_SMN_C2PMSG_66);
+ for(timeout = 200; timeout && readl(mmio + mmMP1_SMN_C2PMSG_90) != 0; --timeout)
+ msleep(1);
+
+ /* wait for regulators to startup again */
+ msleep(400);
+
+out:
+ /* unmap BAR5 */
+ iounmap(mmio);
+
+ /* restore the PCI state and command register */
+ pci_restore_state(dev);
+ pci_write_config_word(dev, PCI_COMMAND, cfg);
+ return 0;
+}
+
 static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF,
		 reset_intel_82599_sfp_virtfn },
@@ -3836,6 +3927,13 @@ static const struct pci_dev_reset_methods
pci_dev_reset_methods[] = {
	{ PCI_VENDOR_ID_INTEL, 0x0953, delay_250ms_after_flr },
	{ PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
		reset_chelsio_generic_dev },
+ { PCI_VENDOR_ID_ATI, 0x7310, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x7312, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x7318, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x7319, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x731a, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x731b, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x731f, reset_amd_navi10 },
	{ 0 }
 };

--
2.20.1

Sat Aug 1 14:44:51 EDT 2020
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 44c4ae1abd00..a3325beff5a6 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3825,6 +3825,131 @@ static int delay_250ms_after_flr(struct pci_dev *dev, int
probe)
	return 0;
 }

+/*
+ * AMD Navi 10 series GPUs require a vendor specific reset procedure.
+ * According to AMD a PSP mode 2 reset should be enough however at this
+ * time the details of how to perform this are not available to us.
+ * Instead we can signal the SMU to enter and exit BACO which has the same
+ * desired effect.
+ */
+static int reset_amd_navi10(struct pci_dev *dev, int probe)
+{
+ const int mmMP0_SMN_C2PMSG_81 = 0x16091;
+ const int mmMP1_SMN_C2PMSG_66 = 0x16282;
+ const int mmMP1_SMN_C2PMSG_82 = 0x16292;
+ const int mmMP1_SMN_C2PMSG_90 = 0x1629a;
+
+ u16 cfg;
+ resource_size_t mmio_base, mmio_size;
+ uint32_t __iomem * mmio;
+ unsigned int sol;
+ unsigned int timeout;
+
+ /*
+ * if the device has FLR return -ENOTTY indicating that we have no
+ * device-specific reset method.
+ */
+ if (pcie_has_flr(dev))
+ return -ENOTTY;
+
+ /* bus resets still cause navi to flake out */
+ dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET;
+
+ if (probe)
+ return 0;
+
+ /* map BAR5 */
+ mmio_base = pci_resource_start(dev, 5);
+ mmio_size = pci_resource_len(dev, 5);
+ mmio = ioremap_nocache(mmio_base, mmio_size);
+ if (mmio == NULL) {
+ pci_disable_device(dev);
+ pci_err(dev, "Navi10: cannot iomap device\n");
+ return 0;
+ }
+
+ /* save the PCI state and enable memory access */
+ pci_read_config_word(dev, PCI_COMMAND, &cfg);
+ pci_write_config_word(dev, PCI_COMMAND, cfg | PCI_COMMAND_MEMORY);
+
+ #define SMU_WAIT() \
+ for(timeout = 1000; timeout && (readl(mmio + mmMP1_SMN_C2PMSG_90) & 0xFFFFFFFFL)
== 0; --timeout) \
+ udelay(1000); \
+ if (readl(mmio + mmMP1_SMN_C2PMSG_90) != 0x1) \
+ pci_info(dev, "Navi10: SMU error 0x%x (line %d)\n", \
+ readl(mmio + mmMP1_SMN_C2PMSG_90), __LINE__);
+
+ pci_set_power_state(dev, PCI_D0);
+
+ /* it's important we wait for the SOC to be ready */
+ for(timeout = 1000; timeout; --timeout) {
+ sol = readl(mmio + mmMP0_SMN_C2PMSG_81);
+ if (sol != 0xFFFFFFFF)
+ break;
+ udelay(1000);
+ }
+
+ if (sol == 0xFFFFFFFF)
+ pci_warn(dev, "Navi10: timeout waiting for wakeup, continuing anyway\n");
+
+ /* check the sign of life indicator */
+ if (sol == 0x0) {
+ goto out;
+ }
+
+ pci_info(dev, "Navi10: performing BACO reset\n");
+
+ /* save the state around the reset */
+ pci_save_state(dev);
+
+ /* the SMU might be busy already, wait for it */
+ SMU_WAIT();
+
+ /* send PPSMC_MSG_ArmD3 with param */
+ writel(0x00, mmio + mmMP1_SMN_C2PMSG_90);
+ writel(0x00, mmio + mmMP1_SMN_C2PMSG_82); // BACO_SEQ_BACO
+ writel(0x46, mmio + mmMP1_SMN_C2PMSG_66);
+ SMU_WAIT();
+
+ /* send PPSMC_MSG_EnterBaco with param */
+ writel(0x00, mmio + mmMP1_SMN_C2PMSG_90);
+ writel(0x00, mmio + mmMP1_SMN_C2PMSG_82); // BACO_SEQ_BACO
+ writel(0x18, mmio + mmMP1_SMN_C2PMSG_66);
+ SMU_WAIT();
+
+ /* wait for the regulators to shutdown */
+ mdelay(1000);
+
+ /* send PPSMC_MSG_ExitBaco */
+ writel(0x00, mmio + mmMP1_SMN_C2PMSG_90);
+ writel(0x19, mmio + mmMP1_SMN_C2PMSG_66);
+ SMU_WAIT();
+
+ #undef SMU_WAIT
+
+ /* wait for the SOC register to become valid */
+ for(timeout = 1000; timeout; --timeout) {
+ sol = readl(mmio + mmMP0_SMN_C2PMSG_81);
+ if (sol != 0xFFFFFFFF)
+ break;
+ udelay(1000);
+ }
+
+ if (sol != 0x0) {
+ pci_err(dev, "Navi10: sol register = 0x%x\n", sol);
+ goto out;
+ }
+
+out:
+ /* unmap BAR5 */
+ iounmap(mmio);
+
+ /* restore the state and command register */
+ pci_restore_state(dev);
+ pci_write_config_word(dev, PCI_COMMAND, cfg);
+ return 0;
+}
+
 static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF,
		 reset_intel_82599_sfp_virtfn },
@@ -3836,6 +3961,13 @@ static const struct pci_dev_reset_methods
pci_dev_reset_methods[] = {
	{ PCI_VENDOR_ID_INTEL, 0x0953, delay_250ms_after_flr },
	{ PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
		reset_chelsio_generic_dev },
+ { PCI_VENDOR_ID_ATI, 0x7310, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x7312, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x7318, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x7319, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x731a, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x731b, reset_amd_navi10 },
+ { PCI_VENDOR_ID_ATI, 0x731f, reset_amd_navi10 },
	{ 0 }
 };

--
2.20.1

Sat Aug 1 12:35:16 EDT 2020
diff -r 53486ffd17ae sys/src/cmd/8c/txt.c
--- a/sys/src/cmd/8c/txt.c Fri Jul 31 08:52:17 2020 -0700
+++ b/sys/src/cmd/8c/txt.c Sat Aug 01 09:35:15 2020 -0700
@@ -865,7 +865,7 @@
		gmove(f, &fregnode0);
		gins(AFADDD, nodfconst(-2147483648.), &fregnode0);
		gins(AFMOVLP, f, &nod);
- gins(ASUBL, nodconst(-2147483648), &nod);
+ gins(ASUBL, nodconst(-0x80000000), &nod);
		gmove(&nod, t);
		return;

diff -r 53486ffd17ae sys/src/cmd/cc/lex.c
--- a/sys/src/cmd/cc/lex.c Fri Jul 31 08:52:17 2020 -0700
+++ b/sys/src/cmd/cc/lex.c Sat Aug 01 09:35:15 2020 -0700
@@ -444,7 +444,7 @@
 yylex(void)
 {
	vlong vv;
- long c, c1, t;
+ long c, c1, t, w;
	char *cp;
	Rune rune;
	Sym *s;
@@ -844,7 +844,22 @@
		yyerror("overflow in constant");

	vv = yylval.vval;
- if(c1 & Numvlong) {
+ /*
+ * Implicit widening: if we have no type suffix, and we've
+ * overflowed the constant, we widen.  C99 requires hex and
+ * octal constants widen to an unsigned type, and then to
+ * the next signed type that fits.  Decimal constants go
+ * directly to signed.  Do not pass go, do not collect 200
+ * dollars.
+ *
+ * This is silly, but we do it anyways.
+ */
+ w = 32;
+ if((c1 & (Numdec|Numuns)) == Numdec)
+ w = 31;
+ if(c1 & Numvlong || (c1 & Numlong) == 0 && (uvlong)vv >= 1ULL<<w){
+ if((c1&(Numdec|Numvlong)) == Numdec && vv < 1ULL<<32)
+ warn(Z, "int constant widened to vlong: %s", symb);
		if((c1 & Numuns) || convvtox(vv, TVLONG) < 0) {
			c = LUVLCONST;
			t = TUVLONG;


Sat Aug 1 10:37:33 EDT 2020
diff -r 53486ffd17ae sys/src/cmd/8c/txt.c
--- a/sys/src/cmd/8c/txt.c Fri Jul 31 08:52:17 2020 -0700
+++ b/sys/src/cmd/8c/txt.c Sat Aug 01 07:37:32 2020 -0700
@@ -865,7 +865,7 @@
		gmove(f, &fregnode0);
		gins(AFADDD, nodfconst(-2147483648.), &fregnode0);
		gins(AFMOVLP, f, &nod);
- gins(ASUBL, nodconst(-2147483648), &nod);
+ gins(ASUBL, nodconst(-2147483648L), &nod);
		gmove(&nod, t);
		return;

diff -r 53486ffd17ae sys/src/cmd/cc/lex.c
--- a/sys/src/cmd/cc/lex.c Fri Jul 31 08:52:17 2020 -0700
+++ b/sys/src/cmd/cc/lex.c Sat Aug 01 07:37:32 2020 -0700
@@ -444,7 +444,7 @@
 yylex(void)
 {
	vlong vv;
- long c, c1, t;
+ long c, c1, t, w;
	char *cp;
	Rune rune;
	Sym *s;
@@ -844,7 +844,22 @@
		yyerror("overflow in constant");

	vv = yylval.vval;
- if(c1 & Numvlong) {
+ /*
+ * Implicit widening: if we have no type suffix, and we've
+ * overflowed the constant, we widen.  C99 requires hex and
+ * octal constants widen to an unsigned type, and then to
+ * the next signed type that fits.  Decimal constants go
+ * directly to signed.  Do not pass go, do not collect 200
+ * dollars.
+ *
+ * This is silly, but we do it anyways.
+ */
+ w = 32;
+ if((c1 & (Numdec|Numuns)) == Numdec)
+ w = 31;
+ if(c1 & Numvlong || (c1 & Numlong) == 0 && (uvlong)vv >= 1ULL<<w){
+ if((c1&(Numdec|Numvlong)) == Numdec && vv < 1ULL<<32)
+ warn(Z, "int constant widened to vlong: %s", symb);
		if((c1 & Numuns) || convvtox(vv, TVLONG) < 0) {
			c = LUVLCONST;
			t = TUVLONG;


Fri Jul 31 16:34:35 EDT 2020
#!  /bin/sh

echo -n "Binding vegas..."
for dev in "0000:03:00.0" "0000:03:00.1"; do
    vendor=$(cat /sys/bus/pci/devices/${dev}/vendor)
    device=$(cat /sys/bus/pci/devices/${dev}/device)
    if [ -e /sys/bus/pci/devices/${dev}/driver ]; then
	echo "${dev}" | tee /sys/bus/pci/devices/${dev}/driver/unbind >
	/dev/null
	while [ -e /sys/bus/pci/devices/${dev}/driver ]; do
	    sleep 0.1
	done
    fi
    echo "${vendor} ${device}" | tee /sys/bus/pci/drivers/vfio-pci/new_id >
    /dev/null
done
echo "done"

qemu-system-x86_64 \
    -enable-kvm \
    -M q35,accel=kvm \
    -m 8048 \
    -cpu host,kvm=off -smp 3,sockets=1,cores=3,threads=1, \
    -drive if=pflash,format=raw,readonly,file=/usr/share/ovmf/x64/OVMF_CODE.fd \
    -drive if=pflash,format=raw,file=/usr/share/ovmf/x64/OVMF_VARS.fd \
    -device vfio-pci,host=03:00.0 \
    -device vfio-pci,host=03:00.1 \
    -monitor unix:/tmp/monitor.sock,server,nowait \
    -nographic \
    -daemonize

Thu Jul 30 18:39:48 EDT 2020
diff -r c5110aa667d8 sys/src/cmd/cc/lex.c
--- a/sys/src/cmd/cc/lex.c Wed Jul 29 13:56:03 2020 +0930
+++ b/sys/src/cmd/cc/lex.c Thu Jul 30 15:39:48 2020 -0700
@@ -444,7 +444,7 @@
 yylex(void)
 {
	vlong vv;
- long c, c1, t;
+ long c, c1, t, w;
	char *cp;
	Rune rune;
	Sym *s;
@@ -844,7 +844,22 @@
		yyerror("overflow in constant");

	vv = yylval.vval;
- if(c1 & Numvlong) {
+ /*
+ * Implicit widening: if we have no type suffix, and we've
+ * overflowed the constant, we widen.  C99 requires hex and
+ * octal constants widen to an unsigned type, and then to
+ * the next signed type that fits.  Decimal constants go
+ * directly to signed.  Do not pass go, do not collect 200
+ * dollars.
+ *
+ * This is silly, but we do it anyways.
+ */
+ w = 32;
+ if((c1 & (Numdec|Numuns)) == Numdec)
+ w = 31;
+ if(c1 & Numvlong || (c1 & Numlong) == 0 && (uvlong)vv >= 1ULL<<w){
+ if((c1&(Numdec|Numvlong)) == Numdec && vv < 1ULL<<32)
+ warn(Z, "int constant widened to vlong: %s", symb);
		if((c1 & Numuns) || convvtox(vv, TVLONG) < 0) {
			c = LUVLCONST;
			t = TUVLONG;


Thu Jul 30 15:34:50 EDT 2020
--- /mnt/git/object/ee19f22be32c725ab41c27918de1e6240d1866fc/tree/./mkfile Wed Jul
29 17:36:33 2020
+++ ./mkfile Thu Jul 30 12:34:01 2020
@@ -8,10 +8,14 @@ pages = ${md: public/%.md= public/%.
	 $md $txt \
	 public/sitemap.html

-all:V: pages
+all:V: pages mans

 pages:V: $pages

+# workaround for env var size limit
+mans:V:
+ mk public/man/^`{cd /sys/man && walk -f [0-9]}^.html
+
 clean:V:
	rm -rf $pages

@@ -32,3 +36,7 @@ public/%.md: data/%.md

 public/%.txt: data/%.txt
	cp data/$stem.txt $target
+
+public/man/%.html: /sys/man/%
+ mkdir -p `{basename -d public/man/$stem}
+ troff -manhtml /sys/man/2/tmdate | troff2html -t $stem >
public/man/$stem.html


Thu Jul 30 11:26:45 EDT 2020
diff -r c5110aa667d8 sys/src/cmd/acme/text.c
--- a/sys/src/cmd/acme/text.c Wed Jul 29 13:56:03 2020 +0930
+++ b/sys/src/cmd/acme/text.c Thu Jul 30 11:24:58 2020 -0400
@@ -636,15 +636,13 @@
		goto Return;
	}

- if(!c->advance){
- warning(nil, "%.*S%s%.*S*%s\n",
- dir.nr, dir.r,
- dir.nr>0 && dir.r[dir.nr-1]!='/' ? "/" : "",
- nstr, str,
- c->nmatch?  "" : ": no matches in:");
- for(i=0; i<c->nfile; i++)
- warning(nil, " %s\n", c->filename[i]);
- }
+ if(!c->advance)
+ run(nil, smprint("echo %.*S%s%.*S*%s; /bin/ls", dir.nr, dir.r,
+ dir.nr>0 && dir.r[dir.nr-1]!='/' ? "/" : "",
+ nstr, str,
+ c->nmatch?  "" : ": no matches in:"),
+ runesmprint("%.*S", dir.nr, dir.r),
+ dir.nr, TRUE, nil, nil, FALSE);

	if(c->advance)
		rp = runesmprint("%s", c->string);


Wed Jul 29 21:07:38 EDT 2020
Date: Tue, 28 Jul 2020 21:10:51 +0200
From: cinap_lenrek@felloff.net
To: 9front@9front.org
Subject: Re: [9front] The 9 Documentation Project
Reply-To: 9front@9front.org

i think alot of confusion comes from the auth= atribute in the
ip/ipnet= entry vs.  auth= attribute on the authdom= entry.

the auth= attribute from ip/ipnet is actually only used by terminals
that netboot!  it is an attribute that the dhcp server will put in
a special option to ship it to the client so the client can dial
the authentication server to authenticate against the (root)
fileserver before having access to ndb.

but once you'r booted, factotum will actually look for authdom=
attribute in ndb to resolve the authentication server for a particular
domain presented in the p9any handshake, and IGNORE the auth=
attribute on a host or ipnet completely.

the protocol (omiting nonce and dh/dp9ik steps) works like this:

0) client connects to server
1) server presetns a list of domains, host identities and protocols
2) client picks a protocol and uses the domain and find the authentication
server for the domain and does a ticket request
3) decrypts client part of the ticket with its own password and extracts shared
secret
4) forwards the server part of the ticket to the server
5) server decrypts the ticket with his own password and extracts shared secret
6) client and server verify that they each other known the shared secret
7) success.  optinally use shared secret to establish encrypted channel (tlssrtv)

the step that bugs most people is 2), as in the protocol, only
the authentication DOMAIN is send over the wire.  finding the AS
is the job of the CLIENT.

theres also a trick: if you use a dns domain name as the authdom,
then you can register an A/AAAA record for p9auth.$authdom and factotum;
if it can't find authdom= attribute in ndb; will attempt to contact
p9auth.$authdom instead as the auth server.  then the client doesnt
need to add a authdom= entry in its ndb!

kerberos solves this with SRV records.

the error that happens is that people miss the authdom= attribute, and
assume the authentication server is per network.  no.  it is not.  it is
just a bootstrap mechanism!  and the real mechanism is apparently not
well known to many people.

the issue with dns is that newbies dont have dns under their control.
so p9auth is out.  srv records is out.  the only thing left what we can
do is find ways to avoid this hack and deprecate the auth= attribute.
maybe have dhcpd automatically determine authdom by dialing the root
fileserver and doing the resolution of authserver on behalf of the
client.

or we could ship all the authdoms= from ndb in a dhcp option.

maybe factotum itself could provide a hint over p9any protocol?
like we have the service factotum look into ndb and provide a list of
hints of the external addresses of the authservers for each key?

in any case, i think we could avoid alot of confusion by improving
the way of this bootstrap mechanism works.

--
cinap



Wed Jul 29 20:56:55 EDT 2020
To: tuhs@tuhs.org
Date: Wed, 22 Jul 2020 13:11:16 -0400 (EDT)
From: norman@oclsc.org (Norman Wilson)
Subject: [TUHS] Bell Labs Sysadmins
Errors-To: tuhs-bounces@minnie.tuhs.org
Sender: "TUHS" <tuhs-bounces@minnie.tuhs.org>

Henry Bent:

  Are there any former Bell Labs sysadmins on this list?  My father was the
  sysadmin for hoh* (Crawford Hill, mostly the radio astronomy folks) in the
  mid-late '80s and early '90s and I would be especially interested to hear
  from hou* (Holmdel, what a building!) folks but also ihn* (Indian Hill) and
  the like.  I'm very curious about what life was like on the ground, so to
  speak.

=====

It is worth pointing out that, like many universities, Bell
Labs had at least two layers of computing and therefore of
sysadmins.  There were official central Comp Centers, which
is the world Henry asks specifically about; but there were
also less-central computing facilities at the divisional and
center and department level.

I never worked for a comp center, but my role in 1127 was
basically that of sysadmin for our center's own systems;
the ones used both for our day-to-day computing (including
that known to the uucp world as research!) and for OS and
other experiments and research and hacking.

There were also two large VAXes called alice and rabbit,
which afforded general-use computing for other departments
in Division 112.  Us 1127 sysadmins (I wasn't the only one
by any means) ran those too; I don't know the full history
but I gather that happened because there was some desire
to run the Research version of UNIX rather than the comp-center
one for that purpose.

One system I had hands in straddled the researcher/comp-center
boundary: 3k, the Cray X-MP/24 bought specifically for
researchers.  It was physically located in the comp center,
but managed jointly: it ran Cray's UNICOS but with
substantial additions from the Research world, including
the stream I/O system (which is rather self-contained so
it was not too hard to graft into a different UNIX) and
Datakit support (using a custom interface board designed
and built by Alan Kaplan and debugged by me and Alan
over several late-night sessions.  (I remember that
the string "feefoefum\n", which is an obscure cultural
reference from one of my previous workplaces, was
particularly effective at shaking out bugs!)
Once UNICOS-a-la-Research was running stably, staff from
the Murray Hill Comp Center looked after day-to-day
operations, with Research involved more for software
support as needed.

Norman Wilson
Toronto ON



Wed Jul 29 20:49:46 EDT 2020
From rsc@golang.org Tue Jul 21 11:21:58 EDT 2020
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From: Russ Cox <rsc@golang.org>
Date: Tue, 21 Jul 2020 11:21:36 -0400
Subject: [go-nuts] draft designs for file system interfaces & file embedding
To: golang-nuts <golang-nuts@googlegroups.com>
Mailing-list: list golang-nuts@googlegroups.com; contact
golang-nuts+owners@googlegroups.com

Hi all,

I've posted two draft designs: one introducing general-purpose file system
interfaces, with Rob Pike; and one for embedding files into Go programs,
with Brad Fitzpatrick.  These are draft designs we're circulating for
feedback, not official proposals.  (We certainly hope they will be well
received and can be made into proposals, but that's not where we are today.)

If you are interested, there are docs and videos linked below.  Because it
worked well for the //go:build draft design, we're using Reddit again for
the discussion, also linked below.  Reddit's proper threading support scales
better than GitHub or a single large mail thread.  But for those who don't
want to use Reddit, I will keep an eye on this thread as well and reply as
best I can.

io/fs draft design
 - Video: https://golang.org/s/draft-iofs-video
 - Design: https://golang.org/s/draft-iofs-design
 - Q&A: https://golang.org/s/draft-iofs-reddit

//go:embed draft design
 - Video: https://golang.org/s/draft-embed-video
 - Design: https://golang.org/s/draft-embed-design
 - Q&A: https://golang.org/s/draft-embed-reddit

Thanks!

Best,
Russ

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